Three-dimensional (“3D”) and/or 2.5D integrated circuits (“ICs”) are becoming more prevalent in semiconductor architecture. The increased density of dies and the costs associated with manufacturing these dies dictates that the testing performed on dies must make full use of all good dies. Current testing schemes that test one die at a time as if each die was to be used as a stand-alone chip do not take into account the reality that dies may be stacked together and operated as a stack. Thus, a die that may fail a typical testing regime, for example a testing regime which includes an at-speed test that checks for the existence of delays in the die, would typically be discarded. Such testing regimes, when taking into account the reality that dies may be stacked together and operated as a stack, may unnecessarily inflate die failure rate and, therefore, costs.
Faults within a die can generally be classified into one of two categories: hard defects and weak defects. Hard defects, such as stuck faults, are typically easy to detect and generally are those types of faults that are always present and cause permanent failure. Weak defects, on the other hand, are harder to detect and may cause additional delay in a circuit within the die based on the defect size. Examples of weak defects include a resistive via and a partial missing connection between components within the die. Each of these, and other, types of weak defects induce a timing delay within the die.
Each die, whether operated in a stand-alone manner or as part of a stack of dies, typically has a timing budget which may include slack time, e.g., the time between when a data bit reaches a data storage circuit and the time when the data storage circuit latches the data bit before sending the latched data bit off to the next component, either within the same die or to another die in the stack of dies. In most instances, each die in a stack of dies operates within its own clock domain. Since the different clock domains for dies within a stack of dies are not necessarily exactly synchronized, there exists an opportunity to make advantageous use of the timing differences between dies within a stack of dies.